June 12, 2022
FPGA - Linsn RV901T card (Xilinx Spartan 6)
I ordered two of these on May 31, 2022. They arrived June 11, 2022 (a bit under 2 weeks).
They are intended for use as part of a system to control big LED panels.
These are the "receiver" card, presumably receiving via the ethernet, then
decoding via the FPGA and driving the panels.
I ordered two of the RV901 cards, shipping for both was $10 and at $16 each, the total
comes to $42, so each card will cost me $21. Order placed 5-13-2022 on AliExpress.
Other boards like the Colorlight 5A-75B and 5A-75E use a Lattice ECP5-25 FPGA
which can be worked with using an entirely open source toolchain,
and have been reverse engineered.
I see AliExpress listings offering an RV201 as a replacement for the RV901,
but I avoided these since I don't see any mention of them under the "Chubby" project
What do we have?
The card has a pair of screw terminals as well as a 4 pin Molex connector to receive power,
so that is a nice start. Also:
- Two RJ-45 Gb ethernet ports
- M12L64322A DRAM (64 Mbit as 4x32bitx512k)
- 25Q32 spi flash (for the FPGA)
- Xilinx Spartan 6 LX16 (sort of a mid range 6 series device)
- 11 bidirectional level shifters (like 245lvt), i.e. 88 bits of IO
So, the question is whether the IO is fixed to be output only (fairly likely to drive LED panels),
and whether a constraints file mapping the FPGA pins to the real world will be available or hard
to generate.
It turns out there are 11 8 bit transceivers (level shifters, 245 devices).
3 of them have the DIR pin grounded (so they are always outputs).
The other 8 all have DIR tied together and controlled by FPGA F13.
So, they can be all in or all out (which is hardly convenient.
The trace looks accessible, so some careful rework could change this.
Feedback? Questions?
Drop me a line!
Tom's Computer Info / [email protected]