Is it possible to run Vivado without a block model -- yes it is, and this deserves investigation. It almost seems possible that I could get the result I want just by giving a constraint file. If I knew the magic names of the EMIO signals, I could just put them directly in the constraint file like:
#set_property -dict { PACKAGE_PIN F16 IOSTANDARD LVCMOS33 } [get_ports { led_A }];
set_property -dict { PACKAGE_PIN F16 IOSTANDARD LVCMOS33 } [get_ports { emio[0] }];
It turns out that "emio" is not the proper name (it was just a wild guess),
It turns out to be "GPIO_0_tri_io[0]". See my second page on blinking LED.
Also, it is not enough to just give a constraint file, you also need to set up the Zynq GPIO/emio and then
create an external port for some number of signals. This creates a set of FPGA IO blocks that now need to
be assigned to physical pins and that is where the constraint file comes in.
Tom's Computer Info / [email protected]